Integrated circuits: random access memory (RAM)

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Cypress Semiconductor

Asynchronous memory / SRAM

The unit is manufactured by Cypress, and is an asynchronous SRAM that is integrated with an on-chip ECC. It is ideal for use...

Asynchronous memory / SRAM

The unit is manufactured by Cypress, and is an asynchronous SRAM that is integrated with an on-chip ECC. It is ideal for use in applications such as communication, data processing in medical and military industries.

The rapid SRAM models are compatible with previous Asynchronous models which enables the user to enhance system effectiveness without investing in PCB re-design. The unit has a broad operating voltage that ranges from 1.8 V-5.0 V and complies with the RoHS standards.

Static memory / random access / non-volatile / nv-SRAM - 16 Mb

There are numerous densities on the novel serial nvSRAM range, across interfaces commonly used in metering and more. With nvSRAM, there...

Static memory / random access / non-volatile / nv-SRAM - 16 Mb

There are numerous densities on the novel serial nvSRAM range, across interfaces commonly used in metering and more. With nvSRAM, there is practically an unlimited read/write ability, with infinite recall cycles and data retention capacity for up to 20 years. Additionally, all serial nvSRAM devices come in small industry standard packages.

Highlights include the 64 Kbit - 1 Mbit density, 12C or SPI interface, 12C - up to 3.4 MHz and SPI up to 104 MHz operating frequency, the 0 and 3 SPI modes and the 8-SOIC, 16-SOIC package.

SRAM memory / multi-port - Quadport™

The QuadPort Datapath Switching Element (DSE) range is an efficient range of equipment that allows for complete independent working...

SRAM memory / multi-port - Quadport™

The QuadPort Datapath Switching Element (DSE) range is an efficient range of equipment that allows for complete independent working of the ports so that there can be simultaneous access of the 64K x 18-bit data storage array making them work expertly in domains of various frequencies. Every port is able to read and write data at the speed of 133 MHz. This gives the device the bandwidth of as much as 10 Gbps. The QuadPort DSE can be used in 2 x 2 switch buffer, data redundancy, data aggregation.
STMicroelectronics

Random access memory / non-volatile / NVRAM - 16 kb - 32 Mb | M48Zxx series

The latest innovative product from ST is the NVRAM (non-volatile RAM) is specially designed to cater to a wide variety of applications and uses. It is...

Random access memory / non-volatile / NVRAM - 16 kb - 32 Mb | M48Zxx series

The latest innovative product from ST is the NVRAM (non-volatile RAM) is specially designed to cater to a wide variety of applications and uses. It is mainly created for the purpose of highly reliable data protection, even during unexpected power failures or outages and maintaining a fast RAM write speeds with indefinite staying power. This device range is available in two types of packaging, 16 Kbits to 32 Mbits. Users can choose between a fully integrated solution in a DIP package that includes a battery, or a surface mount SOIC package that allows for a SNAPHAT detachable or expendable battery.

EEPROM memory / serial-access - 2 Mb

EEPROM is the embedded processing, memory storage product, which is designed for universal compatibility. Thedevice-set works with mainstream bus types such as SPI and...

EEPROM memory / serial-access - 2 Mb

EEPROM is the embedded processing, memory storage product, which is designed for universal compatibility. Thedevice-set works with mainstream bus types such as SPI and...
Texas Instruments Semiconductor

First in-first out memory - CD, SN54, SN series

CD40105B is a low-power first-in-first-out (FIFO) flexible storage register that has capacity to store up to 16 4-bit words. It can deftly handle input and output data at varying shifting rates, making it a perfect solution...

First in-first out memory - CD, SN54, SN series

CD40105B is a low-power first-in-first-out (FIFO) flexible storage register that has capacity to store up to 16 4-bit words. It can deftly handle input and output data at varying shifting rates, making it a perfect solution for being a buffer agent between asynchronous systems.

Every word position in this register is timed by a control flip-flop that houses a marker bit. While '0' refers to the positional vacancy, '1' refers to position's data that has been filed.

The detection takes place with control flip-flop and conducts the communication with its dedicated status to the next flip-flop. Whenever a control flip-flop is seen to be in '0' state along with a '1' in the previous flip-flop, a clock pulse is generated for transferring data from the previous four data latches into its own and then resetting the previous flip-flop to '0'.
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